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  p-dso-28-9 semiconductor group 1 1999-01-07 trilithic ? bts 774 g overview features ? quad switch driver ? free configurable as bridge or quad-switch ? optimized for dc motor management applications ? ultra low r ds on @25 c: high-side switch: typ.165 m w , low-side switch: typ. 45 m w ? very high peak current capability ? very low quiescent current ? space- and thermal optimized power p-dso-package ? full short-circuit-protection ? operates up to 40 v ? status flag diagnosis ? overtemperature shut down with hysteresis ? short-circuit detection and diagnosis ? open-load detection and diagnosis ? c-mos compatible inputs ? internal clamp diodes ? isolated sources for external current sensing ? over- and under-voltage detection with hysteresis description the bts 774 g is a trilithic contains one double high-side switch and two low-side switches in one p-dso-28-9 -package. silicon instead of heatsink becomes true the ultra low r ds on of this device avoids powerdissipation. it saves costs in mechanical construction and mounting and increases the efficiency. the high-side switches are produced in the siemens smart sipmos ? technology. it is fully protected and contains the signal conditioning circuitry for diagnosis. (the comparable standard high-side product is the bts 611l1 .) type ordering code package bts 774 g q67007-a9336 p-dso-28-9
bts 774 g semiconductor group 2 1999-01-07 for minimized r ds on the two low-side switches are n channel vertical power fets in the siemens smart sipmos ? technology. fully protected by embedded protection functions. (the comparable standard product is the bsp 78 ). each drain of these three chips is mounted on separated leadframes (see p-dso-28-9 pin configuration). the sources of all four power transistors are connected to separate pins. so the bts 774 g can be used in h-bridge configuration as well as in any other switch configuration. moreover, it is possible to add current sense resistors. all these features open a broad range of automotive and industrial applications.
bts 774 g semiconductor group 3 1999-01-07 figure 1 pin configuration (top view) aep02071 1 2 3 425 26 27 28 6 7 8 9 5 10 23 22 21 20 24 19 11 13 12 14 17 16 18 15 ls-lead frame 1 hs-lead frame dl1 gl1 dl1 n.c. dhvs gnd gh1 st gh2 dhvs n.c. dl2 gl2 dl2 dl1 sl1 sl1 dl1 dhvs sh2 sh2 sh1 sh1 dhvs dl2 sl2 sl2 dl2 ls-lead frame 2
bts 774 g semiconductor group 4 1999-01-07 bold type: pin needs power wiring 1) to reduce the thermal resistance these pins are direct connected via metal bridges to the leadframe. pin definitions and functions pin no. symbol function 1, 3, 25, 28 dl1 drain of low-side switch1 leadframe 1 1) 2 gl1 gate of low-side switch1 4 n.c. not connected 5, 10, 19, 24 dhvs drain of high-side switches and power supply voltage leadframe 2 1) 6 gnd ground 7 gh1 gate of high-side switch1 8 st status of high-side switches; open drain output 9 gh2 gate of high-side switch2 11 n.c. not connected 12, 14, 15, 18 dl2 drain of low-side switch2 leadframe 3 1) 13 gl2 gate of low-side switch2 16, 17 sl2 source of low-side switch2 20, 21 sh2 source of high-side switch2 22, 23 sh1 source of high-side switch1 26, 27 sl1 source of low-side switch1
bts 774 g semiconductor group 5 1999-01-07 figure 2 block diagram aeb02676 driver in out l l 0 0 h l 1 0 l h 0 1 h h 1 1 diagnosis 8 7 gh1 st gh2 9 gnd 6 r o1 o2 r biasing and protection gl1 2 gl2 13 sh2 dl2 sh1 dl1 21 20, 18 15, 14, 12, 22, 23 25, 28 3, 1, 26, 16, 27 17 24 19, 10, 5, sl1 sl2 dhvs protection gate driver protection gate driver
bts 774 g semiconductor group 6 1999-01-07 circuit description input circuit the control inputs gh1,2 consist of ttl/cmos compatible schmitt-triggers with hysteresis. buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. the inputs gl1 and gl2 are connected to the internal gate-driving units of the fully protected n-channel vertical power-mos-fets. output stages the output stages consist of an ultra low r ds on power-mos h-bridge. embedded protective circuits make the outputs short circuit proof to ground, to the supply voltage and load short circuit proof. positive and negative voltage spikes, which occur when driving inductive loads, are limited by integrated power clamp diodes. short circuit protection the outputs are protected against C output short circuit to ground C output short circuit to the supply voltage, and C overload (load short circuit). an internal op-amp controls the drain-source-voltage by comparing the ds-voltage- drop with an internal reference voltage. above this trippoint the op-amp reduces the output current depending on the junction temperature and the drop voltage. in the case of overloaded high-side switches the status output is set to low. if the hs-switches are in off-state-condition internal resistors r o1,2 from sh1,2 to gnd pull the voltage at sh1,2 to low values. on each output pin sh1 and sh2 an output examiner circuit compares the output voltages with the internal reference voltage veo. this results in switching the status output to low. the fully protected low-side switches have no status output. overtemperature protection the highside and the lowside switch also incorporates an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. undervoltage-lockout (uvlo) when v s reaches the switch-on voltage v uvon the ic becomes active with a hysteresis. the high-side output transistors are switched off if the supply voltage v s drops below the switch off value v uvoff .
bts 774 g semiconductor group 7 1999-01-07 overvoltage-lockout (ovlo) when v s reaches the switch-off voltage v ovoff the high-side output transistors are switched off with a hysteresis. the ic becomes active if the supply voltage v s drops below the switch-on value v ovon . open load detection open load is detected by current measurement. if the output current drops below an internal fixed level the error flag is set with a delay. status flag various errors as listed in the table diagnosis are detected by switching the open drain output st to low.
bts 774 g semiconductor group 8 1999-01-07 truthtable and diagnosis (valid only for the high-side-switches) flag gh1 gh2 sh1 sh2 st remarks inputs outputs normal operation; identical with functional truth table 0 0 1 1 0 1 0 1 l l h h l h l h 1 1 1 1 stand-by mode switch2 active switch1 active both switches active open load at high-side switch1 open load at high-side switch2 0 0 1 0 1 x 0 1 x 0 0 1 z z h l h x l h x z z h 1 1 0 1 1 0 detected detected short circuit to dhvs at high-side switch1 short circuit to dhvs at high-side switch2 0 0 1 0 1 x 0 1 x 0 0 1 h h h l h x l h x h h h 0 1 1 0 1 1 detected detected overtemperature high-side switch1 0 1 x x l l x x 1 0 detected overtemperature high-side switch2 x x 0 1 x x l l 1 0 detected overtemperature both high-side switch 0 x 1 0 1 x l l l l l l 1 0 0 detected detected over- and under-voltage x x l l 1 not detected inputs: outputs: status: 0 = logic low z = output in tristate condition 1 = no error 1 = logic high l = output in sink condition 0 = error x = dont care h = output in source condition x = voltage level undefined
bts 774 g semiconductor group 9 1999-01-07 electrical characteristics note: maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. absolute maximum ratings C 40 c < t j < 150 c parameter symbol limit values unit remarks min. max. high-side-switches (pins dhvs, gh1,2 and sh1,2) supply voltage v s C 0.3 43 v C hs-drain current i dhs C 8 * a * internally limited hs-input current i gh C 2 2 ma pin gh1 and gh2 hs-input voltage v gh C 10 16 v pin gh1 and gh2 status output st status output current i st C 5 5 ma pin st low-side-switches (pins dl1,2, gl1,2 and sl1,2) break-down voltage v (br)dss 40 v v gs = 0 v; i d <= 1 ma ls-drain current i dls 16 * a * internally limited ls-input voltage v gl C 0.3 10 v pin gl1 and gl2 temperatures junction temperature t j C 40 150 cC storage temperature t stg C 50 150 cC thermal resistances (one hs-ls-path active) ls-junction case r thjcls C 20 k/w measured to pin3 or 12 hs-junction case r thjchs C 20 k/w measured to pin19 junction ambient r thja C 60 k/w C
bts 774 g semiconductor group 10 1999-01-07 note: in the operating range the functions given in the circuit description are fulfilled. operating range parameter symbol limit values unit remarks min. max. supply voltage v s v uvoff 36 v after v s rising above v uvon input voltages v gh C 0.3 15 v C input voltages v gl C 0.3 10 v C output current i st 0 2 ma C hs-junction temperature t jhs C 40 150 cC ls-junction temperature t jls C 40 150 cC
bts 774 g semiconductor group 11 1999-01-07 electrical characteristics i sh1 = i sh2 = i sl1 = i sl2 = 0 a; C 40 c < t j < 150 c; 8 v > v s > 18 v unless otherwise specified parameter symbol limit values unit test condition min. typ. max. current consumption quiescent current i s C1630 m a gh1 = gh2 = l v s = 13.2 v t j = 25 c quiescent current i s CC35 m a gh1 = gh2 = l v s = 13.2 v supply current i s C 2 3.5 ma gh1 or gh2 = h supply current i s C 4 7 ma gh1 and gh2 = h under voltage lockout (uvlo) switch-on voltage v uvon C 5.4 7 v v s increasing switch-off voltage v uvoff 3.5 4.2 C v v s decreasing switch on/off hysteresis v uvhy C 1.2 C v v uvon C v uvoff over voltage lockout (ovlo) switch-off voltage v ovoff 36 37.8 43 v v s increasing switch-on voltage v ovon 35 37.3 C v v s decreasing switch off/on hysteresis v ovhy C 0.7 C v v ovoff C v ovon short circuit of highside switch to gnd initial peak sc current i scp 81013a t j = C 40 c initial peak sc current i scp 6.5 8.5 11 a t j = 25 c initial peak sc current i scp 3.9 5 7 a t j = 150 c
bts 774 g semiconductor group 12 1999-01-07 short circuit of highside switch to v s off-state examiner-voltage v eo 234v v gh = 0 v output pull-down-resistor r o 4 1030k w C open circuit detection of highside switch detection current i ocd 10 90 200 ma C switching times of highside switch switch-on-time; to 90% v sh t on C 0.2 0.4 ms resistive load i sh = 1 a; v s = 12 v switch-off-time; to 10% v sh t off C 0.15 0.4 ms resistive load i sh = 1 a; v s = 12 v note: switching times are guaranteed by design control inputs of highside switches gh 1, 2 h-input voltage v ghh C 2.8 3.5 v C l-input voltage v ghl 1.5 2.3 C v C input voltage hysterese v ghhy C 0.5 C v C h-input current i ghh 20 60 90 m a v gh = 5 v l-input current i ghl 12550 m a v gh = 0.4 v input series resistance r i 2.5 3.5 6 k w C zener limit voltage v ghz 5.4 C C v i gh = 1.6 ma electrical characteristics (contd) i sh1 = i sh2 = i sl1 = i sl2 = 0 a; C 40 c < t j < 150 c; 8 v > v s > 18 v unless otherwise specified parameter symbol limit values unit test condition min. typ. max.
bts 774 g semiconductor group 13 1999-01-07 control inputs gl1, 2 gate-threshold-voltage v gl(th) 0.9 1.7 2.2 v i dl = 2 ma input current i gln C1030 m a v gl = 5 v; normal operation input current i glf C 150 300 m a v gl = 5 v; failure mode short circuit of lowside switch to v s initial peak sc current i scp 18 26 34 a t j = C 40 c 15 21 27 a t j = 25 c 10 14 18 a t j = 150 c switching times of lowside switch switch-on-time; to 90% v sl t on C 100 200 m s resistive load i sh = 1 a; v s = 12 v switch-off-time; to 10% v sl t off C 50 200 m s resistive load i sh = 1 a; v s = 12 v note: switching times are guaranteed by design. status flag output st of highside switch low output voltage v stl C 0.2 0.6 v i st = 1.6 ma leakage current i stlk CC10 m a v st = 5 v zener-limit-voltage v stz 5.4 C C v i st = 1.6 ma electrical characteristics (contd) i sh1 = i sh2 = i sl1 = i sl2 = 0 a; C 40 c < t j < 150 c; 8 v > v s > 18 v unless otherwise specified parameter symbol limit values unit test condition min. typ. max.
bts 774 g semiconductor group 14 1999-01-07 note: the listed characteristics are ensured over the operating range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. thermal shutdown thermal shutdown junction temperature t jsd 155 C 190 cC thermal switch-on junction temperature t jso 150 C 180 cC temperature hysteresis d t C10C c d t = t jsd C t jso output stages leakage current of highside switch i hlk CC12 m a v gh = v sh = 0 v leakage current of lowside switch i lkl C 1.3 10 m a v gl = 0 v v ds = 13 v clamp-diode of highside switch; forward-voltage v fh C 0.8 1.5 v i fh = 3 a clamp-diode leakage- current of highside switch i lkcl C C 10 ma i fh = 3 a clamp-diode of lowside switch; forward-voltage v fl C 0.8 1.2 v i fl = 3 a static drain-source on-resistance of highside switch r ds on h C 165 220 m w i sh =1a t j = 25 c static drain-source on-resistance of lowside switch r ds on l C 4560m w i sl = 1 a; v gl = 5 v t j = 25 c static path on-resistance r ds on C C 500 m w r ds on h +r ds on l i sh = 1 a; electrical characteristics (contd) i sh1 = i sh2 = i sl1 = i sl2 = 0 a; C 40 c < t j < 150 c; 8 v > v s > 18 v unless otherwise specified parameter symbol limit values unit test condition min. typ. max.
bts 774 g semiconductor group 15 1999-01-07 figure 3 test circuit hs-source-current named during short circuit named during open circuit named during leakage-cond. i sh1,2 i scp i ocd i hslk aes02677 s v = 12 v driver in out l l 0 0 h l 1 0 l h 0 1 h h 1 1 c s 470 nf diagnosis 8 7 gh1 st gh2 9 gnd 6 r o1 o2 r biasing and protection gl1 2 gl2 13 sh2 dl2 sh1 dl1 21 20 12, 14, 15, 18 22, 23 25, 28 1, 3, sl1 sl2 26, 27 16, 17 dhvs 5, 10, 19, 24 f 100 c l i sl2 sl1 i v dsl1 eo1 v fl1 v -- v fl2 v eo2 dsl2 v v ovoff ovon v v uvon uvoff v v dsh1 fl1 v - - v fl2 dsh2 v i fh1, 2 s i sh2 i dl2 i i dl1 i sh1 i lkl lkl i v gl2 gl(th)2 v v gl(th)1 gl1 v i gnd lkcl1, i 2 gh2 v v gh1 v stl st v stz v m protection gate driver protection driver gate
bts 774 g semiconductor group 16 1999-01-07 figure 4 application circuit aes02678 s v =12v watchdog reset q d gnd i wd r cc v driver in out l l 0 0 h l 1 0 l h 0 1 h h 1 1 r q 100 k w r s w k 10 c q c d 47 nf diagnosis 8 7 gh1 st gh2 9 gnd 6 r o1 o2 r biasing and protection gl1 2 gl2 13 sh2 dl2 sh1 dl1 21 20 12, 14, 15, 18 22, 23 25, 28 1, 3, sl1 sl2 26, 27 16, 17 dhvs 5, 10, 19, 24 do1 m 22 f p 10 f c s tle 4278g m m m 1n4001 do1 z39 gnd protection gate driver protection gate driver
bts 774 g semiconductor group 17 1999-01-07 package outlines 114 15 28 18.1 -0.4 index marking 1) 2.45 -0.1 7.6 10.3 0.3 -0.2 0.2 2.65 max -0.2 1.27 0.23 +0.09 0.1 0.4 0.35 x 45? +0.8 +0.15 0.35 2) 8? max 0.2 28x 1) 2) does not include dambar protrusion of 0.05 max per side 1) does not include plastic or metal protrusions of 0.15 max rer side gps05123 p-dso-28-9 (plastic dual small outline package) sorts of packing package outlines for tubes, trays etc. are contained in our data book package information. dimensions in mm smd = surface mounted device


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